a. Field of the Invention
The present invention relates to a format converting system for a synchronous optical network, and more particularly, to a format converting system which converts a third-order group DS-3 signal into an STS-1 signal, of a synchronous optical network or vice versa.
b. Description of the Related Arts
A synchronous optical network (hereafter simply referred to as a SONET) is known as a synchronous transmission network. One frame of an STS-1 signal of the SONET consists of 6480 bits (=90 bytes.times.9 lines.times.8 bits). One frame is 125 .mu.s and its bit rate is 51.84 Mb/s. Two bytes located at the head of the format are frame synchronizing patterns A1 and A2, and the subsequent one-byte is a channel discriminating pattern.
An STS-3 signal is formed by simply multiplexing three STS-1 signals for every byte, and has a bit rate of 155.52 Mb/s. Such an STS-3 signal is suitable for being transmitted as an optical signal. The STS-3 signal is standardized as an STM-1 signal by the CCITT recommendation. Further, a DS-1 signal formed by multiplexing audio (speech) data by 24 channels is standardized by the CCITT recommendation. The DS-1 signal consists of 193 bits per frame including frame bits, and the bit rate thereof is 1.544 Mb/s. The aforementioned DS-3 signal is formed by multiplexing the DS-1 signals, and has 672 channels and a bit rate of 44.736 Mb/s. It is demanded to convert the third-order group DS-3 signal into the STS-1 signal in conformity to the SONET system and transmit the same.
FIG. 1A illustrates the STS-1 signal of the SONET system. The STS-1 signal has a frame format 103, which consists of 90 bytes.times.9 lines.times.8 bits. The head of the frame is provided with two-bytes of frame synchronizing patterns A1 and A2, and a one-byte channel discriminating pattern C1. The frame format 103 includes a section overhead (SOH), a line overhead (LOH), and a pass overhead (POH). One frame of 810 bytes contains overheads of 36 bytes.
As described previously, the STS-1 signal of the SONET system has a bit rate of 51.84 Mb/s. When converting the format of the DS-3 signal having a bit rate of 44.736 Mb/s into the format of the STS-1 signal, it is necessary to execute a stuffing process because the bit rates thereof are different from each other. For example, some stuff bits are inserted into the third-order group DS-3 signal so that it has a frame structure 101 of 84 bytes.times.9 lines (L1-L9). As shown in FIG. 1A, the stuff bits to be inserted are fixed stuff bits R (normally "0"), stuff control bits C ("1" when stuffing, and "0" at the time of non-stuffing)zero bits 0 (normally "0"), and a variable slot bit S ("0" when stuffing, and data at the time of non-stuffing).
In FIG. 1, t.sub.1 -t.sub.84 denotes time slots of lines L1-L9 in a case where one-byte is one time-slot, and 8R represents that the fixed stuff bits R are inserted by one byte (8 bits). Further, RRC represents that three bits consisting of two fixed stuff bits R and one stuff control bit C are inserted into time slot t.sub.3. CC+6R represents that 8 bits consisting of two stuff control bits C and six fixed stuff bits R are inserted into time slot t.sub.30. CCRROORS represents that 8 bits consisting of two stuff control bits C, two fixed stuff bits R, two zero bits 0 and one variable slot bit S are inserted into t slot t58. Since one-bit data is placed in the position of the variable slot bit S when non-stuffing, the number of inserted bits in time slot t.sub.58 is 8 when stuffing, and 7 when non-stuffing.
The pass overhead POH and the fixed stuff bits R are inserted into the frame structure 101 so that a frame structure 102 of 87 bytes.times.9 lines is formed. Further, overheads (SOH, LOH) of three bytes for each line is added to the frame structure 102 so that the STS-1 signal frame structures 103 of the SONET system of 90 bytes and 9 lines is formed.
When multiplexing three STS-1 signals in conformity with the SONET system to thereby form the STS-3 signal of the SONET system, a frame structure of 270 bytes.times.9 lines is obtained and frame synchronizing patterns A1 and A2 of six bytes and channel discriminating patterns C1 of three bytes are added to the head of the frame. The STS-3 signal having the above-mentioned structure corresponds to the STM-1 signal standardized by the CCITT recommendation.
It is conceivable to configure a format converting circuit for a mutual conversion between the STS-1 signal of the SONET system and the third-order group DS-3 signal by an emitter-coupled logic (ECL) circuit. As is well known, an ECL circuit operates at high speeds, but consumes a large amount of power. Thus, it is conceivable to configure such a format converting circuit by a complementary metal oxide semiconductor (CMOS) circuit. However, a CMOS circuit has an upper limit of operating speed equal to about 40 MHz. For this reason, a CMOS circuit cannot process the DS-3 signal and STS-1 signal with high stability.
From this point of view, it is conceivable to convert a serial signal into a plurality of signals in parallel so that the format converting circuit executes format conversion at a reduced speed. In a case where the DS-3 signal is converted into four parallel signals, each of the parallel signals has a bit rate of about 11 Mb/s. Thus, it becomes possible to employ a CMOS format converting circuit. In this case, stuff bits are inserted into the four parallel signals as shown in FIG. 1B, which illustrates an essential part of the line L1 of the aforementioned frame structure 101 shown in FIG. 1A. Particularly, FIG. 1B illustrates parts of the four parallel signals L11-L14 and stuff bits in time slots t.sub.1 -t.sub.84.
As is shown in FIG. 1B, eight fixed stuff bits R are inserted into each of the time slots t.sub.1 and t.sub.2, and three bits conszisting of two fixed stuff bits R and one stuff control bit C are inserted into subsequent time slot t.sub.3. The remaining five bits indicated by numerals 1-5 are data bits, Further, eight fixed stuff bits R are inserted into time slot t.sub.29, and eight bits consisting of two stuff control bits C and six fixed stuff bits R are inserted into time slot t.sub.30 Subsequent time slot t.sub.31 contains data bits 206-213. Eight fixed stuff bits R are inserted into time slot t.sub.57, and eight bits consisting of two stuff control bits C, two fixed stuff bits R, two zero bits 0, one fixed stuff bit R and one variable slot bit S are inserted into time slot t.sub.58 When stuffing, the variable slot bit S is inserted into time slot t.sub.59. On the other hand, at the time of non-stuffing, the variable slot bit S is replaced by data bit 414, and time slot t.sub.59 has data bits 415-422. When stuffing, data bits 414-421 are inserted into time slot t.sub.59.
As a result, the last of line L1 is data bit 622 when non-stuffing and data bit 621 when stuffing. Thus, in time slot t.sub.3 of line L2, the last data bit subsequent to the stuff control bit C is the first data bit 623 of line L2 or the last data bit 622 of line L1. That is, a simple format conversion from the DS-3 signal to the four parallel signals causes two different orders of data bits in a serial signal derived from the four parallel signals.
On the other hand, in the case where the format of the STS-1 signal of the SONET system is simply converted into that of the DS-3 signal, the DS-3 signal is converted into four parallel signals, and stuff bits are eliminated therefrom. Then the four parallel signals having no stuff bits are converted into a serial signal. In this case, there is a possibility that two different orders of data bits in the serial signal occur. For the above-mentioned reasons, it is demanded to realize format conversion implemented by a low-speed circuit such as a CMOS circuit without causing the erroneous order of data bits.